On Wed, 13 Jan 2021 at 06:26, Richard Henderson <richard.hender...@linaro.org> wrote: > > There was an inconsistency between encoding, which uses > SIMD_DATA_SHIFT, and decoding which used SIMD_OPRSZ_BITS. > This happened to be ok, until e2e7168a214, which reduced > the size of SIMD_OPRSZ_BITS, which lead to truncating all > predicate vector lengths. > > Changes in v2: > * Introduce and use PREDDESC field definitions, rather > than abusing a different SIMD_* macro. > > > r~ > > > Richard Henderson (4): > target/arm: Introduce PREDDESC field definitions > target/arm: Update PFIRST, PNEXT for pred_desc > target/arm: Update ZIP, UZP, TRN for pred_desc > target/arm: Update REV, PUNPK for pred_desc
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> and applied to target-arm.next. thanks -- PMM
