From: Xuzhou Cheng <xuzhou.ch...@windriver.com>
When a write to ECSPI_CONREG register to disable the SPI controller,
imx_spi_reset() is called to reset the controller, but chip select
lines should have been disabled, otherwise the state machine of any
devices (e.g.: SPI flashes) connected to the SPI master is stuck to
its last state and responds incorrectly to any follow-up commands.
Fixes: c906a3a01582 ("i.MX: Add the Freescale SPI Controller")
Signed-off-by: Xuzhou Cheng <xuzhou.ch...@windriver.com>
Signed-off-by: Bin Meng <bin.m...@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Message-Id: <20210112145526.31095-4-bmeng...@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/ssi/imx_spi.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index 801daa5cbfa..2f9e800dd3a 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -255,6 +255,10 @@ static void imx_spi_reset(DeviceState *dev)
imx_spi_update_irq(s);
+ for (i = 0; i < ECSPI_NUM_CS; i++) {
+ qemu_set_irq(s->cs_lines[i], 1);
+ }
+
s->burst_length = 0;
}
--
2.26.2
