On 12/18/20 6:33 AM, remi.denis.courm...@huawei.com wrote: > From: Rémi Denis-Courmont <remi.denis.courm...@huawei.com> > > This adds for the Small Translation tables extension in AArch64 state. > > Signed-off-by: Rémi Denis-Courmont <remi.denis.courm...@huawei.com> > --- > target/arm/cpu.h | 5 +++++ > target/arm/helper.c | 13 ++++++++++--- > 2 files changed, 15 insertions(+), 3 deletions(-) > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index 39abb2a36b..604b9cdd0e 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -3991,6 +3991,11 @@ static inline bool isar_feature_aa64_uao(const > ARMISARegisters *id) > return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, UAO) != 0; > } > > +static inline bool isar_feature_aa64_st(const ARMISARegisters *id) > +{ > + return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, ST) != 0; > +} > + > static inline bool isar_feature_aa64_bti(const ARMISARegisters *id) > { > return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, BT) != 0; > diff --git a/target/arm/helper.c b/target/arm/helper.c > index b927e53ab0..c3a186db35 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -10851,7 +10851,7 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool > is_aa64, uint32_t level, > if (level == 0 && pamax <= 42) { > return false; > } > - if (level == 3) { > + if (level == 3 && !cpu_isar_feature(aa64_st, cpu)) { > return false; > } > break;
As mentioned vs patch 1, I think this hunk should be handled differently. > @@ -10946,7 +10946,7 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env, > uint64_t va, > { > uint64_t tcr = regime_tcr(env, mmu_idx)->raw_tcr; > bool epd, hpd, using16k, using64k; > - int select, tsz, tbi; > + int select, tsz, tbi, max_tsz; > > if (!regime_has_2_ranges(mmu_idx)) { > select = 0; > @@ -10981,7 +10981,14 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env, > uint64_t va, > hpd = extract64(tcr, 42, 1); > } > } > - tsz = MIN(tsz, 39); /* TODO: ARMv8.4-TTST */ > + > + if (cpu_isar_feature(aa64_st, env_archcpu(env))) { > + max_tsz = 48 - using64k; > + } else { > + max_tsz = 39; > + } > + > + tsz = MIN(tsz, max_tsz); > tsz = MAX(tsz, 16); /* TODO: ARMv8.2-LVA */ > > /* Present TBI as a composite with TBID. */ > But the rest of the patch looks good. r~