In order to move the heathrow PIC to the macio device, the PCI bus needs to be
initialised before the macio device and also before wiring the PIC IRQs.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/ppc/mac_oldworld.c | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 2ead34bdf1..e58e0525fe 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -227,6 +227,21 @@ static void ppc_heathrow_init(MachineState *machine)
}
}
+ /* Grackle PCI host bridge */
+ dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE);
+ qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
+ s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
+
+ sysbus_mmio_map(s, 0, GRACKLE_BASE);
+ sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
+ /* PCI hole */
+ memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
+ sysbus_mmio_get_region(s, 2));
+ /* Register 2 MB of ISA IO space */
+ memory_region_add_subregion(get_system_memory(), 0xfe000000,
+ sysbus_mmio_get_region(s, 3));
+
/* XXX: we register only 1 output pin for heathrow PIC */
pic_dev = qdev_new(TYPE_HEATHROW);
sysbus_realize_and_unref(SYS_BUS_DEVICE(pic_dev), &error_fatal);
@@ -251,21 +266,6 @@ static void ppc_heathrow_init(MachineState *machine)
tbfreq = TBFREQ;
}
- /* Grackle PCI host bridge */
- dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE);
- qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
- s = SYS_BUS_DEVICE(dev);
- sysbus_realize_and_unref(s, &error_fatal);
-
- sysbus_mmio_map(s, 0, GRACKLE_BASE);
- sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
- /* PCI hole */
- memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
- sysbus_mmio_get_region(s, 2));
- /* Register 2 MB of ISA IO space */
- memory_region_add_subregion(get_system_memory(), 0xfe000000,
- sysbus_mmio_get_region(s, 3));
-
for (i = 0; i < 4; i++) {
qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x15 + i));
}
--
2.20.1
