On Fri, 11 Dec 2020 at 19:51, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> On 12/11/20 1:33 PM, Rebecca Cran wrote:
> > Is the comment in target/arm/op_helper.c:397 still relevant?
> >
> > uint32_t HELPER(cpsr_read)(CPUARMState *env)
> > {
> > /*
> > * We store the ARMv8 PSTATE.SS bit in env->uncached_cpsr.
> > * This is convenient for populating SPSR_ELx, but must be
> > * hidden from aarch32 mode, where it is not visible.
> > *
> > * TODO: ARMv8.4-DIT -- need to move SS somewhere else.
> > */
> > return cpsr_read(env) & ~(CPSR_EXEC | PSTATE_SS);
> > }
>
> I forgot about this. So we can't "just" store DIT in uncached_cpsr.
>
> I'll let Peter weigh in, but I think it makes sense to move the SS bit
> somewhere else (e.g. env->pstate) and merge it into SPSR_ELx upon interrupt.
> While what we're doing here is convenient, it's not architectural, and it
> would
> be better to follow GetPSRFromPSTATE pseudocode.
Yes, I think that's the best thing to do. We've been skating
by on CPSR and SPSR being the same thing and it's just
stopped working.
-- PMM
