On 2011-08-29 21:25, Anthony Liguori wrote:
> On 08/27/2011 09:16 AM, Jan Kiszka wrote:
>> From: Jan Kiszka<jan.kis...@siemens.com>
>>
>> The master PIC is connected to the LINTIN0 of the APICs. As the APIC
>> currently does not track the state of that line, we have to ask the PIC
>> to re-inject its IRQ after the CPU picked up an event from the APIC.
>>
>> Adds the proper state tracking so that we can already re-assert the CPU
>> IRQ at APIC level if there is a pending PIC IRQ. This allows to remove
>> all the old workarounds.
>>
>> The patch also fixes some failures of the kvm unit tests apic and
>> eventinj by enabling a proper CPU IRQ deassert when the guest masks some
>> pending IRQs at PIC level.
>>
>> Signed-off-by: Jan Kiszka<jan.kis...@siemens.com>
>> ---
>>
>> It turned out that this patch from a larger cleanup series has no
>> dependencies and can be applied directly to master to fix the observed
>> bug.
>>
>> hw/apic.c | 4 +++-
>> hw/i8259.c | 10 ++--------
>> hw/pc.c | 3 ---
>> hw/pc.h | 1 -
>> 4 files changed, 5 insertions(+), 13 deletions(-)
>>
>> diff --git a/hw/apic.c b/hw/apic.c
>> index d8f56c8..22ad635 100644
>> --- a/hw/apic.c
>> +++ b/hw/apic.c
>> @@ -104,6 +104,7 @@ struct APICState {
>> QEMUTimer *timer;
>> int sipi_vector;
>> int wait_for_sipi;
>> + int pic_level;
>> };
>
> Does this need to be save/restored for migration?Nope, but we need some other measure. I thought to remember the pic was refreshing this after load, but I do not find any traces of this now. We likely need a post_load handler in the i8259 that re-asserts the IRQ as required. Jan
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