On 11/19/20 3:56 PM, Peter Maydell wrote: > The RAS feature has a block of memory-mapped registers at offset > 0x5000 within the PPB. For a "minimal RAS" implementation we provide > no error records and so the only registers that exist in the block > are ERRIIDR and ERRDEVID. > > The "RAZ/WI for privileged, BusFault for nonprivileged" behaviour > of the "nvic-default" region is actually valid for minimal-RAS, > so the main benefit of providing an explicit implementation of > the register block is more accurate LOG_UNIMP messages, and a > framework for where we could add a real RAS implementation later > if necessary. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > include/hw/intc/armv7m_nvic.h | 1 + > hw/intc/armv7m_nvic.c | 56 +++++++++++++++++++++++++++++++++++ > 2 files changed, 57 insertions(+)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
