Release 6 recoded the 'Load Linked Word' using SPECIAL3 opcode, this opcode (0b110000) is now reserved.
Ref: A.2 Instruction Bit Encoding Tables: "6Rm instructions signal a Reserved Instruction exception when executed by a Release 6 implementation." The check was added in commit 4368b29a26e ("target-mips: move LL and SC instructions") but got lost during latter refactor in commit d9224450208 ("target-mips: Tighten ISA level checks"). Fixes: d9224450208 ("target-mips: Tighten ISA level checks") Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> --- target/mips/translate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index c64a1bc42e1..b1e7c674d3f 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -30993,6 +30993,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx) break; case OPC_LL: /* Load and stores */ check_insn(ctx, ISA_MIPS2); + check_insn_opc_removed(ctx, ISA_MIPS32R6); if (ctx->insn_flags & INSN_R5900) { check_insn_opc_user_only(ctx, INSN_R5900); } -- 2.26.2