Since commit 5ec3a23e6c8 ("serial: convert PIO to new memory
api read/write") we don't need to worry about accesses bigger
than 8-bit. Use the extract()/deposit() functions to access
the correct part of the 16-bit 'divider' register.Reported-by: Jonathan D. Belanger <jbelang...@rochester.rr.com> Buglink: https://bugs.launchpad.net/qemu/+bug/1904331 Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org> --- Cc: Bug 1904331 <1904...@bugs.launchpad.net> --- hw/char/serial.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/hw/char/serial.c b/hw/char/serial.c index 97f71879ff2..62c627f486f 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -24,6 +24,7 @@ */ #include "qemu/osdep.h" +#include "qemu/bitops.h" #include "hw/char/serial.h" #include "hw/irq.h" #include "migration/vmstate.h" @@ -338,11 +339,7 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val, default: case 0: if (s->lcr & UART_LCR_DLAB) { - if (size == 1) { - s->divider = (s->divider & 0xff00) | val; - } else { - s->divider = val; - } + s->divider = deposit32(s->divider, 8 * addr, 8, val); serial_update_parameters(s); } else { s->thr = (uint8_t) val; @@ -364,7 +361,7 @@ static void serial_ioport_write(void *opaque, hwaddr addr, uint64_t val, break; case 1: if (s->lcr & UART_LCR_DLAB) { - s->divider = (s->divider & 0x00ff) | (val << 8); + s->divider = deposit32(s->divider, 8 * addr, 8, val); serial_update_parameters(s); } else { uint8_t changed = (s->ier ^ val) & 0x0f; @@ -478,7 +475,7 @@ static uint64_t serial_ioport_read(void *opaque, hwaddr addr, unsigned size) default: case 0: if (s->lcr & UART_LCR_DLAB) { - ret = s->divider & 0xff; + ret = extract16(s->divider, 8 * addr, 8); } else { if(s->fcr & UART_FCR_FE) { ret = fifo8_is_empty(&s->recv_fifo) ? @@ -502,7 +499,7 @@ static uint64_t serial_ioport_read(void *opaque, hwaddr addr, unsigned size) break; case 1: if (s->lcr & UART_LCR_DLAB) { - ret = (s->divider >> 8) & 0xff; + ret = extract16(s->divider, 8 * addr, 8); } else { ret = s->ier; } -- 2.26.2
