Hi Peter, > -----Original Message----- > From: Sai Pavan Boddu <sai.pavan.bo...@xilinx.com> > Sent: Tuesday, November 10, 2020 12:22 PM > To: Peter Maydell <peter.mayd...@linaro.org>; Markus Armbruster > <arm...@redhat.com>; Marc-André Lureau <marcandre.lur...@redhat.com>; > Paolo Bonzini <pbonz...@redhat.com>; Gerd Hoffmann <kra...@redhat.com>; > Edgar Iglesias <edg...@xilinx.com>; Francisco Eduardo Iglesias > <figle...@xilinx.com>; Alistair Francis <alistair.fran...@wdc.com>; Eduardo > Habkost <ehabk...@redhat.com>; Ying Fang <fangyi...@huawei.com>; > Philippe Mathieu-Daudé <phi...@redhat.com>; Vikram Garhwal > <f...@xilinx.com>; Paul Zimmerman <pauld...@gmail.com>; Sai Pavan Boddu > <saip...@xilinx.com> > Cc: QEMU Developers <qemu-devel@nongnu.org> > Subject: [PATCH v13 0/4] Add Versal usb model > > This patch series attempts to make 'hcd-xhci' an independent model so it can > be used by both pci and system-bus interface. > > Changes for V2: > Make XHCIState non-qom > Use container_of functions for retriving pci device instance > Initialize the AddressSpace pointer in PATCH 1/3 itself Changes for V3: > Convert XHCIState to TYPE_DEVICE and register as a child of XHCIPciState. > Changes for V4: > Add DWC3 usb controller > Add versal, usb2-reg module > Connect sysbus xhci to versal virt board Changes for V5: > Add extra info about dwc3 and usb2_regs devices in commit messages > Use only one irq for versal usb controller > Mark the unimplemented registers in dwc3 controller > Rebase the patches over master. > Move few mispalced contents from patch 2/7 to 3/7. > Fix the author names in the header. > Move the inclusion of "sysemu/dma.h" from patch 1/7 to 3/7 Changes for > V6: > Fixed style issue in patch 7/7 > Renamed usb2_reg model to VersalUsb2CtrlReg > Fixed author in headers > Changes for V7: > Create a usb structure to keep things clean > Remove the repeated patch in the series i.e 5/7 Changes for V8: > Fix vmstate sturcts to support cross version migration. > Changes for V9: > Added recommended changes to fix vmstate migration. > Fixed commit message on 3/7. > Changes for V10: > use vmstate_post_load avaialble in VMStateDescription > tested vmstate cross migration. > Changes for V11: > Removed the patches which got accepted > Changed object name "USB2Reg" -> "ctrl" > Updated Subject line on cover letter. > Changes for V12: > Use reset class for usb2-ctrl-regs module > Move the few register update to realize > Marked registers which are unimplemented in regapi model > Changs for V13: > Add usb subsystem for xilinx devices, > Memory Map xhci internally to dwc3 device, > Add respective changes to connect VersalUsb2 subsystem to xilinx-versal. [Sai Pavan Boddu] Does these changes looks good ?
Regards, Sai Pavan > > > > Sai Pavan Boddu (2): > usb: Add versal-usb2-ctrl-regs module > usb: xlnx-usb-subsystem: Add xilinx usb subsystem > > Vikram Garhwal (2): > usb: Add DWC3 model > arm: xlnx-versal: Connect usb to virt-versal > > hw/arm/xlnx-versal-virt.c | 58 +++ > hw/arm/xlnx-versal.c | 26 ++ > hw/usb/Kconfig | 6 + > hw/usb/hcd-dwc3.c | 677 > ++++++++++++++++++++++++++++ > hw/usb/meson.build | 3 + > hw/usb/xlnx-usb-subsystem.c | 94 ++++ > hw/usb/xlnx-versal-usb2-ctrl-regs.c | 229 ++++++++++ > include/hw/arm/xlnx-versal.h | 9 + > include/hw/usb/hcd-dwc3.h | 56 +++ > include/hw/usb/xlnx-usb-subsystem.h | 45 ++ > include/hw/usb/xlnx-versal-usb2-ctrl-regs.h | 45 ++ > 11 files changed, 1248 insertions(+) > create mode 100644 hw/usb/hcd-dwc3.c > create mode 100644 hw/usb/xlnx-usb-subsystem.c create mode 100644 > hw/usb/xlnx-versal-usb2-ctrl-regs.c > create mode 100644 include/hw/usb/hcd-dwc3.h create mode 100644 > include/hw/usb/xlnx-usb-subsystem.h > create mode 100644 include/hw/usb/xlnx-versal-usb2-ctrl-regs.h > > -- > 2.7.4
