On 10/30/20 11:25 AM, Huacai Chen wrote: > Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B > R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while > Loongson-3A R4 is the newest and its ISA is almost the superset of all > others. To reduce complexity, in QEMU we just define two CPU types: > > 1, "Loongson-3A1000" CPU which is corresponding to Loongson-3A R1. It is > suitable for TCG because Loongson-3A R1 has fewest ASE. > 2, "Loongson-3A4000" CPU which is corresponding to Loongson-3A R4. It is > suitable for KVM because Loongson-3A R4 has the VZ ASE.
As this series missed the 5.2 release, I'll look at it again in 2 or 3 weeks. > Huacai Chen and Jiaxun Yang (8): > target/mips: Fix PageMask with variable page size > target/mips: Add unaligned access support for MIPS64R6 and Loongson-3 > hw/mips: Implement fw_cfg_arch_key_name() > hw/mips: Add Loongson-3 boot parameter helpers > hw/mips: Add Loongson-3 machine support > docs/system: Update MIPS machine documentation > > Signed-off-by: Huacai Chen <che...@lemote.com> > --- > default-configs/devices/mips64el-softmmu.mak | 1 + > docs/system/target-mips.rst | 10 + > hw/mips/Kconfig | 12 + > hw/mips/fw_cfg.c | 35 ++ > hw/mips/fw_cfg.h | 19 + > hw/mips/loongson3_bootp.c | 165 +++++++ > hw/mips/loongson3_bootp.h | 241 +++++++++++ > hw/mips/loongson3_virt.c | 614 > +++++++++++++++++++++++++++ > hw/mips/meson.build | 3 +- > target/mips/cp0_helper.c | 34 +- > target/mips/cpu.h | 1 + > target/mips/translate.c | 4 +- > 12 files changed, 1130 insertions(+), 9 deletions(-) > create mode 100644 hw/mips/fw_cfg.c > create mode 100644 hw/mips/fw_cfg.h > create mode 100644 hw/mips/loongson3_bootp.c > create mode 100644 hw/mips/loongson3_bootp.h > create mode 100644 hw/mips/loongson3_virt.c > -- > 2.7.0 >
