> -----Original Message-----
> From: Jiangyifei
> Sent: Friday, October 23, 2020 5:12 PM
> To: qemu-devel@nongnu.org; qemu-ri...@nongnu.org
> Cc: pal...@dabbelt.com; alistair.fran...@wdc.com;
> sag...@eecs.berkeley.edu; kbast...@mail.uni-paderborn.de;
> richard.hender...@linaro.org; Zhangxiaofeng (F)
> <victor.zhangxiaof...@huawei.com>; Wubin (H) <wu.wu...@huawei.com>;
> Zhanghailiang <zhang.zhanghaili...@huawei.com>; dengkai (A)
> <dengk...@huawei.com>; yinyipeng <yinyipe...@huawei.com>; Jiangyifei
> <jiangyi...@huawei.com>
> Subject: [PATCH V3 1/6] target/riscv: Merge m/vsstatus and m/vsstatush into
> one uint64_t unit
>
> mstatus/mstatush and vsstatus/vsstatush are two halved for RISCV32.
> This patch expands mstatus and vsstatus to uint64_t instead of target_ulong
> so that it can be saved as one unit and reduce some ifdefs in the code.
>
> Signed-off-by: Yifei Jiang <jiangyi...@huawei.com>
> Signed-off-by: Yipeng Yin <yinyipe...@huawei.com>
> ---
......
> static int write_mstatush(CPURISCVState *env, int csrno, target_ulong val)
> {
> - if ((val ^ env->mstatush) & (MSTATUS_MPV)) {
> + uint64_t valh = (uint64_t)val << 32;
> + uint64_t mask = MSTATUS_MPV | MSTATUS_GVA;
> +
> + if ((valh ^ env->mstatus) & (MSTATUS_MPV)) {
> tlb_flush(env_cpu(env));
> }
>
> - val &= MSTATUS_MPV | MSTATUS_GVA;
> -
> - env->mstatush = val;
> + env->mstatus = (env->mstatus & ~mask) | (valh & mask);
>
> return 0;
> }
Hi Alistair,
It's a little different here.
Previously, except for MPV and GVA, other bits were cleared.
Now, except for MPV and GVA, other bits are reserved.
Refer to write_mstatus () and specification, I think it's better now.
How does it sound?
Yifei
