By using scripts/checkpatch.pl, it is found that many files in hw/riscv/
contain lines with more than 80 characters.
Signed-off-by: Gan Qixin <ganqi...@huawei.com>
---
hw/riscv/opentitan.c | 6 ++++--
hw/riscv/sifive_e.c | 6 ++++--
hw/riscv/sifive_u.c | 12 ++++++++----
3 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 0531bd879b..f587d5993e 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -121,7 +121,8 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc,
Error **errp)
memmap[IBEX_DEV_ROM].base, &s->rom);
/* Flash memory */
- memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc),
"riscv.lowrisc.ibex.flash",
+ memory_region_init_rom(&s->flash_mem, OBJECT(dev_soc),
+ "riscv.lowrisc.ibex.flash",
memmap[IBEX_DEV_FLASH].size, &error_fatal);
memory_region_add_subregion(sys_mem, memmap[IBEX_DEV_FLASH].base,
&s->flash_mem);
@@ -172,7 +173,8 @@ static void lowrisc_ibex_soc_realize(DeviceState *dev_soc,
Error **errp)
create_unimplemented_device("riscv.lowrisc.ibex.pinmux",
memmap[IBEX_DEV_PINMUX].base, memmap[IBEX_DEV_PINMUX].size);
create_unimplemented_device("riscv.lowrisc.ibex.alert_handler",
- memmap[IBEX_DEV_ALERT_HANDLER].base,
memmap[IBEX_DEV_ALERT_HANDLER].size);
+ memmap[IBEX_DEV_ALERT_HANDLER].base,
+ memmap[IBEX_DEV_ALERT_HANDLER].size);
create_unimplemented_device("riscv.lowrisc.ibex.nmi_gen",
memmap[IBEX_DEV_NMI_GEN].base, memmap[IBEX_DEV_NMI_GEN].size);
create_unimplemented_device("riscv.lowrisc.ibex.usbdev",
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index fcfac16816..80ef2f857e 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -111,7 +111,8 @@ static void sifive_e_machine_init(MachineState *machine)
reset_vec[i] = cpu_to_le32(reset_vec[i]);
}
rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec),
- memmap[SIFIVE_E_DEV_MROM].base,
&address_space_memory);
+ memmap[SIFIVE_E_DEV_MROM].base,
+ &address_space_memory);
if (machine->kernel_filename) {
riscv_load_kernel(machine->kernel_filename, NULL);
@@ -227,7 +228,8 @@ static void sifive_e_soc_realize(DeviceState *dev, Error
**errp)
}
/* Map GPIO registers */
- sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0,
memmap[SIFIVE_E_DEV_GPIO0].base);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0,
+ memmap[SIFIVE_E_DEV_GPIO0].base);
/* Pass all GPIOs to the SOC layer so they are available to the board */
qdev_pass_gpios(DEVICE(&s->gpio), dev, NULL);
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 6ad975d692..2c06d1a319 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -528,7 +528,8 @@ static void sifive_u_machine_init(MachineState *machine)
reset_vec[i] = cpu_to_le32(reset_vec[i]);
}
rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec),
- memmap[SIFIVE_U_DEV_MROM].base,
&address_space_memory);
+ memmap[SIFIVE_U_DEV_MROM].base,
+ &address_space_memory);
riscv_rom_copy_firmware_info(memmap[SIFIVE_U_DEV_MROM].base,
memmap[SIFIVE_U_DEV_MROM].size,
@@ -542,7 +543,8 @@ static bool sifive_u_machine_get_start_in_flash(Object
*obj, Error **errp)
return s->start_in_flash;
}
-static void sifive_u_machine_set_start_in_flash(Object *obj, bool value, Error
**errp)
+static void sifive_u_machine_set_start_in_flash(Object *obj, bool value,
+ Error **errp)
{
SiFiveUState *s = RISCV_U_MACHINE(obj);
@@ -731,13 +733,15 @@ static void sifive_u_soc_realize(DeviceState *dev, Error
**errp)
if (!sysbus_realize(SYS_BUS_DEVICE(&s->prci), errp)) {
return;
}
- sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0,
memmap[SIFIVE_U_DEV_PRCI].base);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0,
+ memmap[SIFIVE_U_DEV_PRCI].base);
qdev_prop_set_uint32(DEVICE(&s->gpio), "ngpio", 16);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
return;
}
- sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0,
memmap[SIFIVE_U_DEV_GPIO].base);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0,
+ memmap[SIFIVE_U_DEV_GPIO].base);
/* Pass all GPIOs to the SOC layer so they are available to the board */
qdev_pass_gpios(DEVICE(&s->gpio), dev, NULL);
--
2.23.0
