Not known to fix any bug, but I couldn't help but notice that ATA specifies that writing to this register should clear an interrupt.
ATA7: Section 5.3.3 (Command register - Effect) ATA6: Section 7.4.4 (Command register - Effect) ATA5: Section 7.4.4 (Command register - Effect) ATA4: Section 7.4.4 (Command register - Effect) ATA3: Section 5.2.2 (Command register) Other editions: try searching for the phrase "Writing this register". Signed-off-by: John Snow <js...@redhat.com> --- hw/ide/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/ide/core.c b/hw/ide/core.c index 8a55352e4b2..0d745d63a18 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -1312,6 +1312,7 @@ void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) default: case ATA_IOPORT_WR_COMMAND: ide_clear_hob(bus); + qemu_irq_lower(bus->irq); ide_exec_cmd(bus, val); break; } -- 2.26.2