On Fri, 4 Sep 2020 at 14:38, Philippe Mathieu-Daudé <f4...@amsat.org> wrote: > > On 9/3/20 10:20 PM, Peter Maydell wrote: > > Implement a model of the MPS2 with the AN500 firmware. This is > > similar to the AN385, with the following differences: > > * Cortex-M7 CPU > > * PSRAM is at 0x6000_0000 > > * Ethernet is at 0xa000_0000 > > * No zbt_boot_ctrl remapping of the low 16K > > (but QEMU doesn't implement this anyway) > > * no "block RAM" at 0x01000000 > > > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > > --- > > The AN500 also defines some behaviour for CFG_REG[2567] in > > the SCC (QEMU hw/misc/mps2-scc.c) but none of it is anything > > QEMU can conveniently support so I have left that code as-is > > (a guest accessing those registers will hit the LOG_GUEST_ERROR > > case for "bad offset"). > > > > Tested with a buildroot image created using the instructions at: > > > > https://community.arm.com/developer/tools-software/oss-platforms/w/docs/578/running-uclinux-on-the-arm-mps2-platform > > and the "arm_mps2_CM7fpga" defconfig; QEMU commandline is > > qemu-system-arm -M mps2-an500 -serial stdio -display none -kernel boot.axf > > -device loader,file=linux.axf > > Maybe worth adding in the commit description. > > > @@ -143,13 +149,14 @@ static void mps2_common_init(MachineState *machine) > > * tradeoffs. For QEMU they're all just RAM, though. We arbitrarily > > * call the 16MB our "system memory", as it's the largest lump. > > * > > - * Common to both boards: > > - * 0x21000000..0x21ffffff : PSRAM (16MB) > > + * AN385/AN386/AN511: > > + * 0x21000000 .. 0x21ffffff : PSRAM (16MB) > > ^ Actually this belong to the previous patch.
I guess so... > > - * AN385/AN386 only: > > + * AN385/AN386/AN500: > > * 0x00000000 .. 0x003fffff : ZBT SSRAM1 > > * 0x00400000 .. 0x007fffff : mirror of ZBT SSRAM1 > > * 0x20000000 .. 0x203fffff : ZBT SSRAM 2&3 > > * 0x20400000 .. 0x207fffff : mirror of ZBT SSRAM 2&3 > > + * AN385/AN386 only: > > Ditto? No, this part is fine: at the previous patch it said "AN385/AN386 only" for both these ZBT lines and the parts below. It's only in this patch where we add the AN500 that it has to split into the ZBT lines being 385/386/500 and the remainder being 385/386 only. > Otherwise: > Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org> thanks -- PMM
