Le 27/08/2020 à 13:03, Chen Qun a écrit :
> Clang static code analyzer show warning:
> target/arm/translate-a64.c:13007:5: warning: Value stored to 'rd' is never
> read
> rd = extract32(insn, 0, 5);
> ^ ~~~~~~~~~~~~~~~~~~~~~
> target/arm/translate-a64.c:13008:5: warning: Value stored to 'rn' is never
> read
> rn = extract32(insn, 5, 5);
> ^ ~~~~~~~~~~~~~~~~~~~~~
>
> Reported-by: Euler Robot <euler.ro...@huawei.com>
> Signed-off-by: Chen Qun <kuhn.chen...@huawei.com>
> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
> ---
> Cc: Peter Maydell <peter.mayd...@linaro.org>
> Cc: qemu-...@nongnu.org
> ---
> target/arm/translate-a64.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index c83bb85e4e..47cce160d8 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -13016,9 +13016,6 @@ static void disas_simd_two_reg_misc_fp16(DisasContext
> *s, uint32_t insn)
> fpop = deposit32(opcode, 5, 1, a);
> fpop = deposit32(fpop, 6, 1, u);
>
> - rd = extract32(insn, 0, 5);
> - rn = extract32(insn, 5, 5);
> -
> switch (fpop) {
> case 0x1d: /* SCVTF */
> case 0x5d: /* UCVTF */
>
Applied to my trivial-patches branch.
Thanks,
Laurent
