On 9/1/20 3:39 AM, Bin Meng wrote:
> From: Bin Meng <bin.m...@windriver.com>
>
> At present the CLINT timestamp is using a hard-coded timebase
> frequency value SIFIVE_CLINT_TIMEBASE_FREQ. This might not be
> true for all boards.
>
> Add a new 'timebase-freq' property to the CLINT device, and
> update various functions to accept this as a parameter.
>
> Signed-off-by: Bin Meng <bin.m...@windriver.com>
> Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
>
> ---
>
> (no changes since v1)
>
> include/hw/riscv/sifive_clint.h | 4 +++-
> target/riscv/cpu.h | 6 ++++--
> hw/riscv/microchip_pfsoc.c | 6 +++++-
> hw/riscv/sifive_clint.c | 26 +++++++++++++++-----------
> hw/riscv/sifive_e.c | 3 ++-
> hw/riscv/sifive_u.c | 3 ++-
> hw/riscv/spike.c | 3 ++-
> hw/riscv/virt.c | 3 ++-
> target/riscv/cpu_helper.c | 4 +++-
> target/riscv/csr.c | 4 ++--
> 10 files changed, 40 insertions(+), 22 deletions(-)
>
> diff --git a/include/hw/riscv/sifive_clint.h b/include/hw/riscv/sifive_clint.h
> index 9f5fb3d..a30be0f 100644
> --- a/include/hw/riscv/sifive_clint.h
> +++ b/include/hw/riscv/sifive_clint.h
> @@ -39,11 +39,13 @@ typedef struct SiFiveCLINTState {
> uint32_t timecmp_base;
> uint32_t time_base;
> uint32_t aperture_size;
> + uint32_t timebase_freq;
> } SiFiveCLINTState;
>
> DeviceState *sifive_clint_create(hwaddr addr, hwaddr size,
> uint32_t hartid_base, uint32_t num_harts, uint32_t sip_base,
> - uint32_t timecmp_base, uint32_t time_base, bool provide_rdtime);
> + uint32_t timecmp_base, uint32_t time_base, uint32_t timebase_freq,
> + bool provide_rdtime);
As an future improvement, consider using the recently introduced Clock API.
Regards,
Phil.
