On 8/17/20 1:49 AM, frank.ch...@sifive.com wrote: > From: Frank Chang <frank.ch...@sifive.com> > > NaN-boxed the scalar floating-point register based on RVV 1.0's rules. > > Signed-off-by: Frank Chang <frank.ch...@sifive.com> > --- > target/riscv/insn32.decode | 4 +-- > target/riscv/insn_trans/trans_rvv.inc.c | 42 ++++++++++++++----------- > 2 files changed, 25 insertions(+), 21 deletions(-)
Needs require_rvf(), as discussed vs the previous patch, Otherwise, Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
