On 8/17/20 1:48 AM, frank.ch...@sifive.com wrote: > From: Frank Chang <frank.ch...@sifive.com> > > Introduce the concepts of fractional LMUL for RVV 1.0. > In RVV 1.0, LMUL bits are contiguous in vtype register. > > Signed-off-by: Frank Chang <frank.ch...@sifive.com> > --- > target/riscv/cpu.h | 15 ++++++++------- > target/riscv/translate.c | 16 ++++++++++++++-- > target/riscv/vector_helper.c | 16 ++++++++++++++-- > 3 files changed, 36 insertions(+), 11 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
