On 8/24/20 7:29 AM, Peter Maydell wrote:
> @@ -307,6 +311,10 @@ static bool trans_VSEL(DisasContext *s, arg_VSEL *a)
> tcg_temp_free_i32(tmp);
> break;
> }
> + /* For fp16 the top half is always zeroes */
> + if (sz == 1) {
> + tcg_gen_andi_i32(dest, dest, 0xffff);
> + }
I suppose that'll do. In theory we could avoid this by using the correct
zero-extending loads above, but that's a nasty world, neon_load_foo, and it
doesn't sport 16-bit variants atm.
Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
r~
