From: Frank Chang <frank.ch...@sifive.com> Signed-off-by: Frank Chang <frank.ch...@sifive.com> Reviewed-by: Richard Henderson <richard.hender...@linaro.org> --- target/riscv/helper.h | 2 +- target/riscv/insn32.decode | 2 +- target/riscv/insn_trans/trans_rvv.inc.c | 4 ++-- target/riscv/vector_helper.c | 6 +++--- 4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/target/riscv/helper.h b/target/riscv/helper.h index 0a1179370b1..a5d58010134 100644 --- a/target/riscv/helper.h +++ b/target/riscv/helper.h @@ -1068,7 +1068,7 @@ DEF_HELPER_6(vmxnor_mm, void, ptr, ptr, ptr, ptr, env, i32) DEF_HELPER_4(vpopc_m, tl, ptr, ptr, env, i32) -DEF_HELPER_4(vmfirst_m, tl, ptr, ptr, env, i32) +DEF_HELPER_4(vfirst_m, tl, ptr, ptr, env, i32) DEF_HELPER_5(vmsbf_m, void, ptr, ptr, ptr, env, i32) DEF_HELPER_5(vmsif_m, void, ptr, ptr, ptr, env, i32) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 3d2d43ebd8a..d72120cfd85 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -592,7 +592,7 @@ vmnor_mm 011110 - ..... ..... 010 ..... 1010111 @r vmornot_mm 011100 - ..... ..... 010 ..... 1010111 @r vmxnor_mm 011111 - ..... ..... 010 ..... 1010111 @r vpopc_m 010000 . ..... 10000 010 ..... 1010111 @r2_vm -vmfirst_m 010101 . ..... ----- 010 ..... 1010111 @r2_vm +vfirst_m 010000 . ..... 10001 010 ..... 1010111 @r2_vm vmsbf_m 010110 . ..... 00001 010 ..... 1010111 @r2_vm vmsif_m 010110 . ..... 00011 010 ..... 1010111 @r2_vm vmsof_m 010110 . ..... 00010 010 ..... 1010111 @r2_vm diff --git a/target/riscv/insn_trans/trans_rvv.inc.c b/target/riscv/insn_trans/trans_rvv.inc.c index ce963c33af8..e1f9903a8b5 100644 --- a/target/riscv/insn_trans/trans_rvv.inc.c +++ b/target/riscv/insn_trans/trans_rvv.inc.c @@ -2929,7 +2929,7 @@ static bool trans_vpopc_m(DisasContext *s, arg_rmr *a) } /* vmfirst find-first-set mask bit */ -static bool trans_vmfirst_m(DisasContext *s, arg_rmr *a) +static bool trans_vfirst_m(DisasContext *s, arg_rmr *a) { if (require_rvv(s) && vext_check_isa_ill(s)) { @@ -2948,7 +2948,7 @@ static bool trans_vmfirst_m(DisasContext *s, arg_rmr *a) tcg_gen_addi_ptr(src2, cpu_env, vreg_ofs(s, a->rs2)); tcg_gen_addi_ptr(mask, cpu_env, vreg_ofs(s, 0)); - gen_helper_vmfirst_m(dst, mask, src2, cpu_env, desc); + gen_helper_vfirst_m(dst, mask, src2, cpu_env, desc); gen_set_gpr(a->rd, dst); tcg_temp_free_ptr(mask); diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 13694c1b2c4..973eb689c51 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -4466,9 +4466,9 @@ target_ulong HELPER(vpopc_m)(void *v0, void *vs2, CPURISCVState *env, return cnt; } -/* vmfirst find-first-set mask bit*/ -target_ulong HELPER(vmfirst_m)(void *v0, void *vs2, CPURISCVState *env, - uint32_t desc) +/* vfirst find-first-set mask bit*/ +target_ulong HELPER(vfirst_m)(void *v0, void *vs2, CPURISCVState *env, + uint32_t desc) { uint32_t vm = vext_vm(desc); uint32_t vl = env->vl; -- 2.17.1