On Fri, Jul 24, 2020 at 8:32 AM Richard Henderson <
richard.hender...@linaro.org> wrote:
> From: LIU Zhiwei <zhiwei_...@c-sky.com>
>
> Signed-off-by: LIU Zhiwei <zhiwei_...@c-sky.com>
> Message-Id: <20200626205917.4545-5-zhiwei_...@c-sky.com>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> target/riscv/insn_trans/trans_rvd.inc.c | 8 ++++----
> target/riscv/insn_trans/trans_rvf.inc.c | 8 ++++----
> 2 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/target/riscv/insn_trans/trans_rvd.inc.c
> b/target/riscv/insn_trans/trans_rvd.inc.c
> index ea1044f13b..4f832637fa 100644
> --- a/target/riscv/insn_trans/trans_rvd.inc.c
> +++ b/target/riscv/insn_trans/trans_rvd.inc.c
> @@ -20,10 +20,10 @@
>
> static bool trans_fld(DisasContext *ctx, arg_fld *a)
> {
> - TCGv t0 = tcg_temp_new();
> - gen_get_gpr(t0, a->rs1);
> REQUIRE_FPU;
> REQUIRE_EXT(ctx, RVD);
> + TCGv t0 = tcg_temp_new();
> + gen_get_gpr(t0, a->rs1);
> tcg_gen_addi_tl(t0, t0, a->imm);
>
> tcg_gen_qemu_ld_i64(cpu_fpr[a->rd], t0, ctx->mem_idx, MO_TEQ);
> @@ -35,10 +35,10 @@ static bool trans_fld(DisasContext *ctx, arg_fld *a)
>
> static bool trans_fsd(DisasContext *ctx, arg_fsd *a)
> {
> - TCGv t0 = tcg_temp_new();
> - gen_get_gpr(t0, a->rs1);
> REQUIRE_FPU;
> REQUIRE_EXT(ctx, RVD);
> + TCGv t0 = tcg_temp_new();
> + gen_get_gpr(t0, a->rs1);
> tcg_gen_addi_tl(t0, t0, a->imm);
>
> tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEQ);
> diff --git a/target/riscv/insn_trans/trans_rvf.inc.c
> b/target/riscv/insn_trans/trans_rvf.inc.c
> index 0d04677a02..16df9c5ee2 100644
> --- a/target/riscv/insn_trans/trans_rvf.inc.c
> +++ b/target/riscv/insn_trans/trans_rvf.inc.c
> @@ -25,10 +25,10 @@
>
> static bool trans_flw(DisasContext *ctx, arg_flw *a)
> {
> - TCGv t0 = tcg_temp_new();
> - gen_get_gpr(t0, a->rs1);
> REQUIRE_FPU;
> REQUIRE_EXT(ctx, RVF);
> + TCGv t0 = tcg_temp_new();
> + gen_get_gpr(t0, a->rs1);
> tcg_gen_addi_tl(t0, t0, a->imm);
>
> tcg_gen_qemu_ld_i64(cpu_fpr[a->rd], t0, ctx->mem_idx, MO_TEUL);
> @@ -41,11 +41,11 @@ static bool trans_flw(DisasContext *ctx, arg_flw *a)
>
> static bool trans_fsw(DisasContext *ctx, arg_fsw *a)
> {
> + REQUIRE_FPU;
> + REQUIRE_EXT(ctx, RVF);
> TCGv t0 = tcg_temp_new();
> gen_get_gpr(t0, a->rs1);
>
> - REQUIRE_FPU;
> - REQUIRE_EXT(ctx, RVF);
> tcg_gen_addi_tl(t0, t0, a->imm);
>
> tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEUL);
> --
> 2.25.1
>
>
>
Reviewed-by: Chih-Min Chao <chihmin.c...@sifive.com>
Chih-Min Chao
