> On Jul 1, 2020, at 6:47 PM, Lijun Pan <l...@linux.ibm.com> wrote: > > vdivsw: Vector Divide Signed Word > vdivuw: Vector Divide Unsigned Word > vdivsd: Vector Divide Signed Doubleword > vdivud: Vector Divide Unsigned Doubleword > vmodsw: Vector Modulo Signed Word > vmoduw: Vector Modulo Unsigned Word > vmodsd: Vector Modulo Signed Doubleword > vmodud: Vector Modulo Unsigned Doubleword > > Signed-off-by: Lijun Pan <l...@linux.ibm.com> > --- > v4: add a comment on undefined result of divide operation. > fix if(){} coding style issue, remove blank line. > v3: add missing divided-by-zero, divided-by-(-1) handling > v2: fix coding style > use Power ISA 3.1 flag > Any feedback on this one? Thanks, Lijun