Add _s suffix to all FPU2000 opcode translators and helpers that also
have double-precision variant to unify naming and allow adding DFPU
implementations. Add _fpu2k_ to the name of wur_fcr helper to make space
for the DFPU wur_fcr helper.
Signed-off-by: Max Filippov <jcmvb...@gmail.com>
---
target/xtensa/fpu_helper.c | 10 +++++-----
target/xtensa/helper.h | 10 +++++-----
target/xtensa/translate.c | 20 ++++++++++----------
3 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/target/xtensa/fpu_helper.c b/target/xtensa/fpu_helper.c
index 87487293f9a1..57a284924045 100644
--- a/target/xtensa/fpu_helper.c
+++ b/target/xtensa/fpu_helper.c
@@ -33,7 +33,7 @@
#include "exec/exec-all.h"
#include "fpu/softfloat.h"
-void HELPER(wur_fcr)(CPUXtensaState *env, uint32_t v)
+void HELPER(wur_fpu2k_fcr)(CPUXtensaState *env, uint32_t v)
{
static const int rounding_mode[] = {
float_round_nearest_even,
@@ -82,7 +82,7 @@ float32 HELPER(msub_s)(CPUXtensaState *env, float32 a,
float32 b, float32 c)
&env->fp_status);
}
-uint32_t HELPER(ftoi)(float32 v, uint32_t rounding_mode, uint32_t scale)
+uint32_t HELPER(ftoi_s)(float32 v, uint32_t rounding_mode, uint32_t scale)
{
float_status fp_status = {0};
@@ -90,7 +90,7 @@ uint32_t HELPER(ftoi)(float32 v, uint32_t rounding_mode,
uint32_t scale)
return float32_to_int32(float32_scalbn(v, scale, &fp_status), &fp_status);
}
-uint32_t HELPER(ftoui)(float32 v, uint32_t rounding_mode, uint32_t scale)
+uint32_t HELPER(ftoui_s)(float32 v, uint32_t rounding_mode, uint32_t scale)
{
float_status fp_status = {0};
float32 res;
@@ -106,13 +106,13 @@ uint32_t HELPER(ftoui)(float32 v, uint32_t rounding_mode,
uint32_t scale)
}
}
-float32 HELPER(itof)(CPUXtensaState *env, uint32_t v, uint32_t scale)
+float32 HELPER(itof_s)(CPUXtensaState *env, uint32_t v, uint32_t scale)
{
return float32_scalbn(int32_to_float32(v, &env->fp_status),
(int32_t)scale, &env->fp_status);
}
-float32 HELPER(uitof)(CPUXtensaState *env, uint32_t v, uint32_t scale)
+float32 HELPER(uitof_s)(CPUXtensaState *env, uint32_t v, uint32_t scale)
{
return float32_scalbn(uint32_to_float32(v, &env->fp_status),
(int32_t)scale, &env->fp_status);
diff --git a/target/xtensa/helper.h b/target/xtensa/helper.h
index 8532de0b35f5..a692254fe10a 100644
--- a/target/xtensa/helper.h
+++ b/target/xtensa/helper.h
@@ -46,7 +46,7 @@ DEF_HELPER_3(wsr_dbreaka, void, env, i32, i32)
DEF_HELPER_3(wsr_dbreakc, void, env, i32, i32)
#endif
-DEF_HELPER_2(wur_fcr, void, env, i32)
+DEF_HELPER_2(wur_fpu2k_fcr, void, env, i32)
DEF_HELPER_FLAGS_1(abs_s, TCG_CALL_NO_RWG_SE, f32, f32)
DEF_HELPER_FLAGS_1(neg_s, TCG_CALL_NO_RWG_SE, f32, f32)
DEF_HELPER_3(add_s, f32, env, f32, f32)
@@ -54,10 +54,10 @@ DEF_HELPER_3(sub_s, f32, env, f32, f32)
DEF_HELPER_3(mul_s, f32, env, f32, f32)
DEF_HELPER_4(madd_s, f32, env, f32, f32, f32)
DEF_HELPER_4(msub_s, f32, env, f32, f32, f32)
-DEF_HELPER_FLAGS_3(ftoi, TCG_CALL_NO_RWG_SE, i32, f32, i32, i32)
-DEF_HELPER_FLAGS_3(ftoui, TCG_CALL_NO_RWG_SE, i32, f32, i32, i32)
-DEF_HELPER_3(itof, f32, env, i32, i32)
-DEF_HELPER_3(uitof, f32, env, i32, i32)
+DEF_HELPER_FLAGS_3(ftoi_s, TCG_CALL_NO_RWG_SE, i32, f32, i32, i32)
+DEF_HELPER_FLAGS_3(ftoui_s, TCG_CALL_NO_RWG_SE, i32, f32, i32, i32)
+DEF_HELPER_3(itof_s, f32, env, i32, i32)
+DEF_HELPER_3(uitof_s, f32, env, i32, i32)
DEF_HELPER_4(un_s, void, env, i32, f32, f32)
DEF_HELPER_4(oeq_s, void, env, i32, f32, f32)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index bc01a720719d..0deaeef6b5fa 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -2813,10 +2813,10 @@ static void translate_wur(DisasContext *dc, const
OpcodeArg arg[],
tcg_gen_mov_i32(cpu_UR[par[0]], arg[0].in);
}
-static void translate_wur_fcr(DisasContext *dc, const OpcodeArg arg[],
- const uint32_t par[])
+static void translate_wur_fpu2k_fcr(DisasContext *dc, const OpcodeArg arg[],
+ const uint32_t par[])
{
- gen_helper_wur_fcr(cpu_env, arg[0].in);
+ gen_helper_wur_fpu2k_fcr(cpu_env, arg[0].in);
}
static void translate_wur_fsr(DisasContext *dc, const OpcodeArg arg[],
@@ -5583,7 +5583,7 @@ static const XtensaOpcodeOps core_ops[] = {
.par = (const uint32_t[]){EXPSTATE},
}, {
.name = "wur.fcr",
- .translate = translate_wur_fcr,
+ .translate = translate_wur_fpu2k_fcr,
.par = (const uint32_t[]){FCR},
.coprocessor = 0x1,
}, {
@@ -6373,9 +6373,9 @@ static void translate_float_s(DisasContext *dc, const
OpcodeArg arg[],
TCGv_i32 scale = tcg_const_i32(-arg[2].imm);
if (par[0]) {
- gen_helper_uitof(arg[0].out, cpu_env, arg[1].in, scale);
+ gen_helper_uitof_s(arg[0].out, cpu_env, arg[1].in, scale);
} else {
- gen_helper_itof(arg[0].out, cpu_env, arg[1].in, scale);
+ gen_helper_itof_s(arg[0].out, cpu_env, arg[1].in, scale);
}
tcg_temp_free(scale);
}
@@ -6387,11 +6387,11 @@ static void translate_ftoi_s(DisasContext *dc, const
OpcodeArg arg[],
TCGv_i32 scale = tcg_const_i32(arg[2].imm);
if (par[1]) {
- gen_helper_ftoui(arg[0].out, arg[1].in,
- rounding_mode, scale);
+ gen_helper_ftoui_s(arg[0].out, arg[1].in,
+ rounding_mode, scale);
} else {
- gen_helper_ftoi(arg[0].out, arg[1].in,
- rounding_mode, scale);
+ gen_helper_ftoi_s(arg[0].out, arg[1].in,
+ rounding_mode, scale);
}
tcg_temp_free(rounding_mode);
tcg_temp_free(scale);
--
2.20.1
