On Wed, Jul 01, 2020 at 06:43:37PM -0500, Lijun Pan wrote: > This patch enables the Power ISA 3.1 in QEMU. > > Signed-off-by: Lijun Pan <l...@linux.ibm.com>
Applied to ppc-for-5.2.
> ---
> v4: split to 01/11 and 02/11
> v2: add Power ISA 3.1 flag
>
> target/ppc/cpu.h | 2 +-
> target/ppc/translate_init.inc.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index a5e9c08dcc..ebb5a0811a 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -2201,7 +2201,7 @@ enum {
> PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \
> PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \
> PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206 | \
> - PPC2_ISA300)
> + PPC2_ISA300 | PPC2_ISA310)
> };
>
>
> /*****************************************************************************/
> diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
> index 38cb773ab4..3f72310e60 100644
> --- a/target/ppc/translate_init.inc.c
> +++ b/target/ppc/translate_init.inc.c
> @@ -9206,7 +9206,7 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
> PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
> PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
> PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 |
> - PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL;
> + PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL | PPC2_ISA310;
> pcc->msr_mask = (1ull << MSR_SF) |
> (1ull << MSR_HV) |
> (1ull << MSR_TM) |
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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