On 13/06/2020 14:36, BALATON Zoltan wrote:
> This function resets a CPU not the whole machine so reflect that in
> its name.
>
> Signed-off-by: BALATON Zoltan <bala...@eik.bme.hu>
> ---
> hw/ppc/mac_oldworld.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
> index 4dd872c1a3..9138752ccb 100644
> --- a/hw/ppc/mac_oldworld.c
> +++ b/hw/ppc/mac_oldworld.c
> @@ -73,7 +73,7 @@ static uint64_t translate_kernel_address(void *opaque,
> uint64_t addr)
> return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
> }
>
> -static void ppc_heathrow_reset(void *opaque)
> +static void ppc_heathrow_cpu_reset(void *opaque)
> {
> PowerPCCPU *cpu = opaque;
>
> @@ -127,7 +127,7 @@ static void ppc_heathrow_init(MachineState *machine)
>
> /* Set time-base frequency to 16.6 Mhz */
> cpu_ppc_tb_init(env, TBFREQ);
> - qemu_register_reset(ppc_heathrow_reset, cpu);
> + qemu_register_reset(ppc_heathrow_cpu_reset, cpu);
> }
>
> /* allocate RAM */
Technically this is a board level reset which just happens to pass the CPU for
the
opaque, so I'm not quite sold on this one (as an example look at mac_newworld.c
where
using the ELF load address for the PROM would require a dynamic NIP which is
most
conveniently accessed via a MachineState).
ATB,
Mark.
