2011/7/2 Hervé Poussineau <hpous...@reactos.org>:
> Signed-off-by: Hervé Poussineau <hpous...@reactos.org>
> ---
> hw/ds1225y.c | 100 +++++++++++++++++++++++++++++++++++++++++--------------
> hw/mips.h | 3 --
> hw/mips_jazz.c | 11 +++++-
> 3 files changed, 83 insertions(+), 31 deletions(-)
>
> diff --git a/hw/ds1225y.c b/hw/ds1225y.c
> index 5105b9b..87412e2 100644
> --- a/hw/ds1225y.c
> +++ b/hw/ds1225y.c
> @@ -22,21 +22,20 @@
> * THE SOFTWARE.
> */
>
> -#include "hw.h"
> -#include "mips.h"
> +#include "sysbus.h"
> #include "trace.h"
>
> -typedef struct ds1225y_t
> -{
> +typedef struct {
> + DeviceState qdev;
> uint32_t chip_size;
> + char *filename;
> QEMUFile *file;
> uint8_t *contents;
> -} ds1225y_t;
> -
> +} NvRamState;
>
> static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
> {
> - ds1225y_t *s = opaque;
> + NvRamState *s = opaque;
> uint32_t val;
>
> val = s->contents[addr];
> @@ -64,7 +63,7 @@ static uint32_t nvram_readl (void *opaque,
> target_phys_addr_t addr)
>
> static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t
> val)
> {
> - ds1225y_t *s = opaque;
> + NvRamState *s = opaque;
>
> val &= 0xff;
> trace_nvram_write(addr, s->contents[addr], val);
> @@ -103,34 +102,83 @@ static CPUWriteMemoryFunc * const nvram_write[] = {
> &nvram_writel,
> };
>
> -/* Initialisation routine */
> -void *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
> +static int nvram_post_load(void *opaque, int version_id)
> {
> - ds1225y_t *s;
> - int mem_indexRW;
> + NvRamState *s = opaque;
> +
> + /* Close file, as filename may has changed in load/store process */
> + if (s->file) {
> + qemu_fclose(s->file);
> + }
> +
> + /* Write back nvram contents */
> + s->file = qemu_fopen(s->filename, "wb");
> + if (s->file) {
> + /* Write back contents, as 'wb' mode cleaned the file */
> + qemu_put_buffer(s->file, s->contents, s->chip_size);
> + qemu_fflush(s->file);
> + }
> +
> + return 0;
> +}
> +
> +static const VMStateDescription vmstate_nvram = {
> + .name = "nvram",
This name is too generic, how about ds1225y?
> + .version_id = 0,
> + .minimum_version_id = 0,
> + .minimum_version_id_old = 0,
> + .post_load = nvram_post_load,
> + .fields = (VMStateField[]) {
> + VMSTATE_VARRAY_UINT32(contents, NvRamState, chip_size, 0,
> + vmstate_info_uint8, uint8_t),
> + VMSTATE_END_OF_LIST()
> + }
> +};
> +
> +typedef struct {
> + SysBusDevice busdev;
> + NvRamState nvram;
> +} SysBusNvRamState;
> +
> +static int nvram_sysbus_initfn(SysBusDevice *dev)
> +{
> + NvRamState *s = &FROM_SYSBUS(SysBusNvRamState, dev)->nvram;
> QEMUFile *file;
> + int s_io;
>
> - s = qemu_mallocz(sizeof(ds1225y_t));
> - s->chip_size = 0x2000; /* Fixed for ds1225y chip: 8 KiB */
> s->contents = qemu_mallocz(s->chip_size);
>
> + s_io = cpu_register_io_memory(nvram_read, nvram_write, s,
> + DEVICE_NATIVE_ENDIAN);
> + sysbus_init_mmio(dev, s->chip_size, s_io);
> +
> /* Read current file */
> - file = qemu_fopen(filename, "rb");
> + file = qemu_fopen(s->filename, "rb");
> if (file) {
> /* Read nvram contents */
> qemu_get_buffer(file, s->contents, s->chip_size);
> qemu_fclose(file);
> }
> - s->file = qemu_fopen(filename, "wb");
> - if (s->file) {
> - /* Write back contents, as 'wb' mode cleaned the file */
> - qemu_put_buffer(s->file, s->contents, s->chip_size);
> - qemu_fflush(s->file);
> - }
> + nvram_post_load(s, 0);
>
> - /* Read/write memory */
> - mem_indexRW = cpu_register_io_memory(nvram_read, nvram_write, s,
> - DEVICE_NATIVE_ENDIAN);
> - cpu_register_physical_memory(mem_base, s->chip_size, mem_indexRW);
> - return s;
> + return 0;
> }
> +
> +static SysBusDeviceInfo nvram_sysbus_info = {
> + .qdev.name = "nvram",
> + .qdev.size = sizeof(SysBusNvRamState),
> + .qdev.vmsd = &vmstate_nvram,
> + .init = nvram_sysbus_initfn,
> + .qdev.props = (Property[]) {
> + DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size,
> 0x2000),
> + DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename),
> + DEFINE_PROP_END_OF_LIST(),
> + },
> +};
> +
> +static void nvram_register(void)
> +{
> + sysbus_register_withprop(&nvram_sysbus_info);
> +}
> +
> +device_init(nvram_register)
> diff --git a/hw/mips.h b/hw/mips.h
> index 93c8831..cae5f4c 100644
> --- a/hw/mips.h
> +++ b/hw/mips.h
> @@ -8,9 +8,6 @@ PCIBus *gt64120_register(qemu_irq *pic);
> /* bonito.c */
> PCIBus *bonito_init(qemu_irq *pic);
>
> -/* ds1225y.c */
> -void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
> -
> /* g364fb.c */
> int g364fb_mm_init(target_phys_addr_t vram_base,
> target_phys_addr_t ctrl_base, int it_shift,
> diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
> index a100394..99002c3 100644
> --- a/hw/mips_jazz.c
> +++ b/hw/mips_jazz.c
> @@ -37,6 +37,7 @@
> #include "loader.h"
> #include "mc146818rtc.h"
> #include "blockdev.h"
> +#include "sysbus.h"
>
> enum jazz_model_e
> {
> @@ -115,6 +116,8 @@ void mips_jazz_init (ram_addr_t ram_size,
> void* rc4030_opaque;
> int s_rtc, s_dma_dummy;
> NICInfo *nd;
> + DeviceState *dev;
> + SysBusDevice *sysbus;
> ISADevice *pit;
> DriveInfo *fds[MAX_FD];
> qemu_irq esp_reset, dma_enable;
> @@ -266,8 +269,12 @@ void mips_jazz_init (ram_addr_t ram_size,
> /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
> audio_init(i8259, NULL);
>
> - /* NVRAM: Unprotected at 0x9000, Protected at 0xa000, Read only at
> 0xb000 */
> - ds1225y_init(0x80009000, "nvram");
> + /* NVRAM */
> + dev = qdev_create(NULL, "nvram");
> + qdev_prop_set_string(dev, "filename", qemu_strdup("nvram"));
For the file name it may be OK.
> + qdev_init_nofail(dev);
> + sysbus = sysbus_from_qdev(dev);
> + sysbus_mmio_map(sysbus, 0, 0x80009000);
>
> /* LED indicator */
> jazz_led_init(0x8000f000);
> --
> 1.7.5.4
>
>
>
