On [2020 Apr 30] Thu 18:24:31, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com> > > Auto-clear PHY CR Autoneg bits. This makes this model > work with recent Linux kernels. > > Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
Reviewed-by: Francisco Iglesias <frasse.igles...@gmail.com> > --- > hw/net/xilinx_axienet.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c > index 704788811a..0f97510d8a 100644 > --- a/hw/net/xilinx_axienet.c > +++ b/hw/net/xilinx_axienet.c > @@ -149,8 +149,8 @@ tdk_write(struct PHY *phy, unsigned int req, unsigned int > data) > break; > } > > - /* Unconditionally clear regs[BMCR][BMCR_RESET] */ > - phy->regs[0] &= ~0x8000; > + /* Unconditionally clear regs[BMCR][BMCR_RESET] and auto-neg */ > + phy->regs[0] &= ~0x8200; > } > > static void > -- > 2.20.1 >
