On Fri, Apr 17, 2020 at 03:13:31PM +0000, Ani Sinha wrote:
> A new option "use_acpi_unplug" is introduced for PIIX which will
> selectively only disable hot unplugging of both hot plugged and
> cold plugged PCI devices on non-root PCI buses. This will prevent
> hot unplugging of devices from Windows based guests from system
> tray but will not prevent devices from being hot plugged into the
> guest.
>
> The patch is initial version and is a rough implementation. It has
> been tested on Windows guests.
>
> Signed-off-by: Ani Sinha <ani.si...@nutanix.com>
Is there a real reason to do this? Can't we just limit the
hotplug control to pcie ports? At some point I'd like us to
start leaving piix alone...
> ---
> hw/acpi/piix4.c | 3 +++
> hw/i386/acpi-build.c | 40 ++++++++++++++++++++++++++--------------
> 2 files changed, 29 insertions(+), 14 deletions(-)
>
> diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
> index d706360..dad1bf4 100644
> --- a/hw/acpi/piix4.c
> +++ b/hw/acpi/piix4.c
> @@ -82,6 +82,7 @@ typedef struct PIIX4PMState {
>
> AcpiPciHpState acpi_pci_hotplug;
> bool use_acpi_pci_hotplug;
> + bool use_acpi_unplug;
>
> uint8_t disable_s3;
> uint8_t disable_s4;
> @@ -676,6 +677,8 @@ static Property piix4_pm_properties[] = {
> DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL, PIIX4PMState, s4_val, 2),
> DEFINE_PROP_BOOL("acpi-pci-hotplug-with-bridge-support", PIIX4PMState,
> use_acpi_pci_hotplug, true),
> + DEFINE_PROP_BOOL("acpi-pci-hotunplug-enable-bridge", PIIX4PMState,
> + use_acpi_unplug, true),
> DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState,
> acpi_memory_hotplug.is_enabled, true),
> DEFINE_PROP_END_OF_LIST(),
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 2bc8117..526feb2 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -94,6 +94,7 @@ typedef struct AcpiPmInfo {
> bool s3_disabled;
> bool s4_disabled;
> bool pcihp_bridge_en;
> + bool pcihup_bridge_en;
> uint8_t s4_val;
> AcpiFadtData fadt;
> uint16_t cpu_hp_io_base;
> @@ -220,6 +221,9 @@ static void acpi_get_pm_info(AcpiPmInfo *pm)
> pm->pcihp_bridge_en =
> object_property_get_bool(obj, "acpi-pci-hotplug-with-bridge-support",
> NULL);
> + pm->pcihup_bridge_en =
> + object_property_get_bool(obj, "acpi-pci-hotunplug-enable-bridge",
> + NULL);
> }
>
> static void acpi_get_misc_info(AcpiMiscInfo *info)
> @@ -430,7 +434,8 @@ static void build_append_pcihp_notify_entry(Aml *method,
> int slot)
> }
>
> static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus,
> - bool pcihp_bridge_en)
> + bool pcihp_bridge_en,
> + bool pcihup_bridge_en)
> {
> Aml *dev, *notify_method = NULL, *method;
> QObject *bsel;
> @@ -458,11 +463,14 @@ static void build_append_pci_bus_devices(Aml
> *parent_scope, PCIBus *bus,
> dev = aml_device("S%.02X", PCI_DEVFN(slot, 0));
> aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
> aml_append(dev, aml_name_decl("_ADR", aml_int(slot << 16)));
> - method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
> - aml_append(method,
> - aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
> - );
> - aml_append(dev, method);
> + if (pcihup_bridge_en || pci_bus_is_root(bus)) {
> + method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
> + aml_append(method,
> + aml_call2("PCEJ", aml_name("BSEL"),
> + aml_name("_SUN"))
> + );
> + aml_append(dev, method);
> + }
> aml_append(parent_scope, dev);
>
> build_append_pcihp_notify_entry(notify_method, slot);
> @@ -516,12 +524,14 @@ static void build_append_pci_bus_devices(Aml
> *parent_scope, PCIBus *bus,
> /* add _SUN/_EJ0 to make slot hotpluggable */
> aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
>
> - method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
> - aml_append(method,
> - aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
> - );
> - aml_append(dev, method);
> -
> + if (pcihup_bridge_en || pci_bus_is_root(bus)) {
> + method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
> + aml_append(method,
> + aml_call2("PCEJ", aml_name("BSEL"),
> + aml_name("_SUN"))
> + );
> + aml_append(dev, method);
> + }
> if (bsel) {
> build_append_pcihp_notify_entry(notify_method, slot);
> }
> @@ -532,7 +542,8 @@ static void build_append_pci_bus_devices(Aml
> *parent_scope, PCIBus *bus,
> */
> PCIBus *sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
>
> - build_append_pci_bus_devices(dev, sec_bus, pcihp_bridge_en);
> + build_append_pci_bus_devices(dev, sec_bus, pcihp_bridge_en,
> + pcihup_bridge_en);
> }
> /* slot descriptor has been composed, add it into parent context */
> aml_append(parent_scope, dev);
> @@ -2133,7 +2144,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> if (bus) {
> Aml *scope = aml_scope("PCI0");
> /* Scan all PCI buses. Generate tables to support hotplug. */
> - build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en);
> + build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en,
> + pm->pcihup_bridge_en);
>
> if (TPM_IS_TIS(tpm_find())) {
> dev = aml_device("ISA.TPM");
> --
> 1.9.4
