ping https://patchwork.kernel.org/patch/11437661/ https://patchwork.kernel.org/patch/11437665/
________________________________ From: Corey Wharton <core...@fb.com> Sent: Friday, March 13, 2020 12:35 PM To: qemu-devel@nongnu.org <qemu-devel@nongnu.org>; qemu-ri...@nongnu.org <qemu-ri...@nongnu.org> Cc: Palmer Dabbelt <pal...@dabbelt.com>; Alistair Francis <alistair.fran...@wdc.com>; Sagar Karandikar <sag...@eecs.berkeley.edu>; Bastian Koppelmann <kbast...@mail.uni-paderborn.de>; Bin Meng <bmeng...@gmail.com>; Corey Wharton <core...@fb.com> Subject: [PATCH v2 0/2] Support different CPU types for the sifive_e machine The purpose of this patch set is to allow the sifive_e machine to run with different CPU targets to enable different ISA entensions. To that end it also introduces a new sifive-e34 CPU type which provides the same ISA as sifive-e31, with the addition of the single precision floating-point extension (f). The default CPU for the sifive_e machine is unchanged. v2: Added missing RVU flag Corey Wharton (2): riscv: sifive_e: Support changing CPU type target/riscv: Add a sifive-e34 cpu type hw/riscv/sifive_e.c | 3 ++- target/riscv/cpu.c | 10 ++++++++++ target/riscv/cpu.h | 1 + 3 files changed, 13 insertions(+), 1 deletion(-) -- 2.21.1
