This was supposed to be submitted before -rc1, but I've dropped the ball (sorry).
The following changes since commit 2833ad487cfff7dc33703e4731b75facde1c561e: Update version for v5.0.0-rc1 release (2020-03-31 18:02:47 +0100) are available in the Git repository at: git://github.com/ehabkost/qemu.git tags/x86-next-pull-request for you to fetch changes up to d965dc35592d24c0c1519f1c566223c6277cb80e: target/i386: Add ARCH_CAPABILITIES related bits into Icelake-Server CPU model (2020-03-31 19:13:32 -0300) ---------------------------------------------------------------- x86 queue for -rc2 Fixes: * EPYC CPU model APIC ID topology fixes (Babu Moger) * Fix crash when enabling intel-pt on older machine types (Luwei Kang) * Add missing ARCH_CAPABILITIES bits to Icelake-Server CPU model (Xiaoyao Li) ---------------------------------------------------------------- Babu Moger (7): hw/386: Add EPYC mode topology decoding functions target/i386: Cleanup and use the EPYC mode topology functions hw/i386: Introduce apicid functions inside X86MachineState i386: Introduce use_epyc_apic_id_encoding in X86CPUDefinition hw/i386: Move arch_id decode inside x86_cpus_init target/i386: Enable new apic id encoding for EPYC based cpus models i386: Fix pkg_id offset for EPYC cpu models Luwei Kang (1): target/i386: set the CPUID level to 0x14 on old machine-type Xiaoyao Li (1): target/i386: Add ARCH_CAPABILITIES related bits into Icelake-Server CPU model hw/i386/pc.c | 7 +- hw/i386/x86.c | 42 ++++++-- include/hw/i386/topology.h | 100 ++++++++++++++++++ include/hw/i386/x86.h | 9 ++ target/i386/cpu.c | 207 ++++++++++++++----------------------- target/i386/cpu.h | 2 + 6 files changed, 225 insertions(+), 142 deletions(-) -- 2.24.1