Re: [Qemu-devel] [HelenOS-devel] [sparc64] Miscomputed minimum of a group of numbers in sparc64 emulation

[Jakub Jermar]

On 1.7.2011 12:41, Artyom Tarasenko wrote:
> Looks like it's a pretty nice test case.
> 
> The test case scenario is to load the initial values into the
> registers (you already know them),
> calculate the mins, cmp the result with expected and jump somewhere.
> Since it happens with interrupts disabled, we don't need an OS or bios
> to test that. The binary just has to have an entry point at 0x20,
> then we can load it instead of bios.
> 
> Care to produce the test case? (Otherwise I'll do it, but probably not
> until the weekend after the next one).

Yes I have a small reproducible testcase, see the attachments.

When _not_ singlestepping via GDB's `stepi`, the testcase will fail and
crash Qemu like this:

qemu: fatal: Trap 0x0101 while trap level (5) >= MAXTL (5), Error state
<register dumped here>

On the other hand, when I attach GDB to Qemu and step through all
instructions using `stepi`, the testcase will succeed and crash Qemu
like this:

qemu: fatal: Trap 0x0100 while trap level (5) >= MAXTL (5), Error state
<registers dumped here>

Mind the difference in the trap type - 0x100 for success, 0x101 for failure.

This is how I run the test:

Without GDB:
$ qemu-system-sparc64 -bios ./testcase

With GDB:
$ qemu-system-sparc64 -bios ./testcase -s -S

>From another terminal:
$ /usr/local/cross/sparc64/bin/sparc64-linux-gnu-gdb
(gdb) set architecture sparc:v9
(gdb) target remote localhost:1234
(gdb) stepi
...

Hope this helps to fix the problem.

Jakub

.PHONY=all
all:
        rm *.o testcase
        /usr/local/cross/sparc64/bin/sparc64-linux-gnu-as -g testcase.S -o 
testcase.o
        /usr/local/cross/sparc64/bin/sparc64-linux-gnu-ld -Ttext 0x00 
testcase.o -o testcase --oformat binary

testcase
Description: Binary data

.global _start 

.register %g2, #scratch
.register %g3, #scratch

.text

.space 0x20

_start:
        set 110393, %i1
        set 0, %i2
        set 131072, %g1
        set 0x40, %g3

        cmp  %i1, %g3
        srl  %g1, 8, %g4
        srl  %g1, 0x18, %g1
        or  %g4, %g1, %g4
        sllx  %g4, 0x30, %g2
        srlx  %g2, 0x30, %g2
        udivx  %i2, %g2, %g1
        mulx  %g1, %g2, %g1
        movgu  %xcc, %g3, %i1
        sub  %i2, %g1, %g1
        sub  %g2, %g1, %g1
        cmp  %i1, %g1
        bgu  %xcc, 0f
        nop

succ:
        ta 0

fail:
0:
        ta 1