On 3/25/20 3:41 PM, Nicholas Piggin wrote:
> This implements mce injection for spapr.
>
> (qemu) mce 0 0x200000 0x80 0xdeadbeef 1
>
> Disabling lock debugging due to kernel taint
> MCE: CPU0: machine check (Severe) Host SLB Multihit DAR: 00000000deadbeef
> [Recovered]
> MCE: CPU0: machine check (Severe) Host SLB Multihit [Recovered]
> MCE: CPU0: PID: 495 Comm: a NIP: [0000000130ee07c8]
> MCE: CPU0: Initiator CPU
> MCE: CPU0: Unknown
> [ 71.567193] MCE: CPU0: NIP: [c0000000000d7f6c] plpar_hcall_norets+0x1c/0x28
> [ 71.567249] MCE: CPU0: Initiator CPU
> [ 71.567308] MCE: CPU0: Unknown
>
> Signed-off-by: Nicholas Piggin <npig...@gmail.com>
Reviewed-by: Cédric Le Goater <c...@kaod.org>
> ---
> hw/ppc/spapr.c | 54 ++++++++++++++++++++++++++++++++++++++++++
> include/hw/ppc/spapr.h | 3 +++
> 2 files changed, 57 insertions(+)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 785c41d205..6dbd1858f4 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -83,6 +83,7 @@
> #include "hw/ppc/spapr_nvdimm.h"
>
> #include "monitor/monitor.h"
> +#include "qapi/qmp/qdict.h"
>
> #include <libfdt.h>
>
> @@ -3420,6 +3421,56 @@ static void spapr_nmi(NMIState *n, int cpu_index,
> Error **errp)
> }
> }
>
> +typedef struct MCEInjectionParams {
> + uint64_t srr1_mask;
> + uint32_t dsisr;
> + uint64_t dar;
> + bool recovered;
> +} MCEInjectionParams;
> +
> +static void spapr_do_mce_on_cpu(CPUState *cs, run_on_cpu_data data)
> +{
> + MCEInjectionParams *params = data.host_ptr;
> + PowerPCCPU *cpu = POWERPC_CPU(cs);
> + CPUPPCState *env = &cpu->env;
> + uint64_t srr1_mce_bits = PPC_BITMASK(42, 45) | PPC_BIT(36);
> +
> + cpu_synchronize_state(cs);
> +
> + env->spr[SPR_SRR0] = env->nip;
> + env->spr[SPR_SRR1] = (env->msr & ~srr1_mce_bits) |
> + (params->srr1_mask & srr1_mce_bits);
> + if (params->dsisr) {
> + env->spr[SPR_DSISR] = params->dsisr;
> + env->spr[SPR_DAR] = params->dar;
> + }
> +
> + spapr_mce_req_event(cpu, params->recovered);
> +}
> +
> +static void spapr_mce(MCEState *m, const QDict *qdict, Error **errp)
> +{
> + int cpu_index = qdict_get_int(qdict, "cpu_index");
> + uint64_t srr1_mask = qdict_get_int(qdict, "srr1_mask");
> + uint32_t dsisr = qdict_get_int(qdict, "dsisr");
> + uint64_t dar = qdict_get_int(qdict, "dar");
> + bool recovered = qdict_get_int(qdict, "recovered");
> + CPUState *cs;
> +
> + cs = qemu_get_cpu(cpu_index);
> +
> + if (cs != NULL) {
> + MCEInjectionParams params = {
> + .srr1_mask = srr1_mask,
> + .dsisr = dsisr,
> + .dar = dar,
> + .recovered = recovered,
> + };
> +
> + run_on_cpu(cs, spapr_do_mce_on_cpu, RUN_ON_CPU_HOST_PTR(¶ms));
> + }
> +}
> +
> int spapr_lmb_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr,
> void *fdt, int *fdt_start_offset, Error **errp)
> {
> @@ -4467,6 +4518,7 @@ static void spapr_machine_class_init(ObjectClass *oc,
> void *data)
> SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
> FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
> NMIClass *nc = NMI_CLASS(oc);
> + MCEClass *mcec = MCE_CLASS(oc);
> HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
> PPCVirtualHypervisorClass *vhc = PPC_VIRTUAL_HYPERVISOR_CLASS(oc);
> XICSFabricClass *xic = XICS_FABRIC_CLASS(oc);
> @@ -4511,6 +4563,7 @@ static void spapr_machine_class_init(ObjectClass *oc,
> void *data)
> smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED;
> fwc->get_dev_path = spapr_get_fw_dev_path;
> nc->nmi_monitor_handler = spapr_nmi;
> + mcec->mce_monitor_handler = spapr_mce;
> smc->phb_placement = spapr_phb_placement;
> vhc->hypercall = emulate_spapr_hypercall;
> vhc->hpt_mask = spapr_hpt_mask;
> @@ -4566,6 +4619,7 @@ static const TypeInfo spapr_machine_info = {
> .interfaces = (InterfaceInfo[]) {
> { TYPE_FW_PATH_PROVIDER },
> { TYPE_NMI },
> + { TYPE_MCE },
> { TYPE_HOTPLUG_HANDLER },
> { TYPE_PPC_VIRTUAL_HYPERVISOR },
> { TYPE_XICS_FABRIC },
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index 42d64a0368..72f86a2ee8 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -929,4 +929,7 @@ void spapr_check_pagesize(SpaprMachineState *spapr,
> hwaddr pagesize,
>
> void spapr_set_all_lpcrs(target_ulong value, target_ulong mask);
> hwaddr spapr_get_rtas_addr(void);
> +
> +void spapr_mce_inject(CPUState *cs, uint64_t srr1_mask, uint32_t dsisr,
> + uint64_t dar, bool recovered);
> #endif /* HW_SPAPR_H */
>
