On 2/21/20 1:45 AM, LIU Zhiwei wrote: > The 32 vector registers will be viewed as a continuous memory block. > It avoids the convension between element index and (regno, offset). > Thus elements can be directly accessed by offset from the first vector > base address. > > Signed-off-by: LIU Zhiwei <zhiwei_...@c-sky.com> > --- > target/riscv/cpu.h | 12 ++++++++++++ > 1 file changed, 12 insertions(+)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
