The launchpad bug only mentions EXT, but I found three more via inspection. I really should extend RISU so that we can do AdvSIMD testing with SVE enabled...
r~ Richard Henderson (4): target/arm: Flush high bits of sve register after AdvSIMD EXT target/arm: Flush high bits of sve register after AdvSIMD TBL/TBX target/arm: Flush high bits of sve register after AdvSIMD ZIP/UZP/TRN target/arm: Flush high bits of sve register after AdvSIMD INS target/arm/translate-a64.c | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.20.1
