On 2/11/20 9:37 AM, Peter Maydell wrote: > The LC bit in the PMCR_EL0 register is supposed to be: > * read/write > * RES1 on an AArch64-only implementation > * an architecturally UNKNOWN value on reset > (and use of LC==0 by software is deprecated). > > We were implementing it incorrectly as read-only always zero, > though we do have all the code needed to test it and behave > accordingly. > > Instead make it a read-write bit which resets to 1 always, which > satisfies all the architectural requirements above. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > target/arm/helper.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
