On 2/11/20 9:37 AM, Peter Maydell wrote: > The ARMv8.1-PMU extension requires: > * the evtCount field in PMETYPER<n>_EL0 is 16 bits, not 10 > * MDCR_EL2.HPMD allows event counting to be disabled at EL2 > * two new required events, STALL_FRONTEND and STALL_BACKEND > * ID register bits in ID_AA64DFR0_EL1 and ID_DFR0 > > We already implement the 16-bit evtCount field and the > HPMD bit, so all that is missing is the two new events: > STALL_FRONTEND > "counts every cycle counted by the CPU_CYCLES event on which no > operation was issued because there are no operations available > to issue to this PE from the frontend" > STALL_BACKEND > "counts every cycle counted by the CPU_CYCLES event on which no > operation was issued because the backend is unable to accept > any available operations from the frontend" > > QEMU never stalls in this sense, so our implementation is trivial: > always return a zero count. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > target/arm/helper.c | 32 ++++++++++++++++++++++++++++++-- > 1 file changed, 30 insertions(+), 2 deletions(-)
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
