This series adds emulation of TIME CSRs for privileged mode. With this series, we see approximately 25+% improvement in hackbench numbers for non-virtualized (or Host) Linux and 40+% improvement in hackbench numbers for Guest/VM Linux.
These patches are based on mainline/alistair/riscv-hyp-ext-v0.5.1 branch of https://github.com/kvm-riscv/qemu.git and can be found in riscv_time_csr_v1 branch of same repo. Anup Patel (2): target/riscv: Emulate TIME CSRs for privileged mode hw/riscv: Provide rdtime callback for TCG in CLINT emulation hw/riscv/sifive_clint.c | 1 + target/riscv/cpu.h | 5 +++ target/riscv/cpu_helper.c | 5 +++ target/riscv/csr.c | 80 +++++++++++++++++++++++++++++++++++++-- 4 files changed, 87 insertions(+), 4 deletions(-) -- 2.17.1