On Tue, 3 Dec 2019 at 02:30, Richard Henderson <richard.hender...@linaro.org> wrote: > > For ARMv8.1, op1 == 5 is reserved for EL2 aliases of > EL1 and EL0 registers. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > --- > target/arm/helper.c | 5 +---- > 1 file changed, 1 insertion(+), 4 deletions(-) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index 023b8963cf..1812588fa1 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -7437,13 +7437,10 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu, > mask = PL0_RW; > break; > case 4: > + case 5: > /* min_EL EL2 */ > mask = PL2_RW; > break; > - case 5: > - /* unallocated encoding, so not possible */ > - assert(false); > - break; > case 6: > /* min_EL EL3 */ > mask = PL3_RW; > --
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
