On Fri, 11 Oct 2019 at 14:50, Richard Henderson <richard.hender...@linaro.org> wrote: > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > --- > v3: Require pre-cleaned addresses. > --- > target/arm/helper-a64.h | 3 ++ > target/arm/mte_helper.c | 96 ++++++++++++++++++++++++++++++++++++++ > target/arm/translate-a64.c | 42 +++++++++++++---- > 3 files changed, 132 insertions(+), 9 deletions(-) >
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c > index 4ecb0a2fb7..4e049bb4aa 100644 > --- a/target/arm/translate-a64.c > +++ b/target/arm/translate-a64.c > @@ -3592,7 +3592,7 @@ static void disas_ldst_tag(DisasContext *s, uint32_t > insn) > uint64_t offset = sextract64(insn, 12, 9) << LOG2_TAG_GRANULE; > int op2 = extract32(insn, 10, 3); > int op1 = extract32(insn, 22, 2); > - bool is_load = false, is_pair = false, is_zero = false; > + bool is_load = false, is_pair = false, is_zero = false, is_mult = false; > int index = 0; > TCGv_i64 dirty_addr, clean_addr, tcg_rt; > > @@ -3602,13 +3602,18 @@ static void disas_ldst_tag(DisasContext *s, uint32_t > insn) > } > These are the insns that should UNDEF if we have only the insn_reg dummy flavour of MTE. (Also, unlike STG and ST2G, none of the M insns want Xt to be <Xt|SP>.) Otherwise Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
