Hi Simon,
On 12/4/19 2:55 PM, Simon Veith wrote:
> In the SMMU_STRTAB_BASE register, the stream table base address only
> occupies bits [51:6]. Other bits, such as RA (bit [62]), must be masked
> out to obtain the base address.
>
> The branch for 2-level stream tables correctly applies this mask by way
> of SMMU_BASE_ADDR_MASK, but the one for linear stream tables does not.
>
> Apply the missing mask in that case as well so that the correct stream
> base address is used by guests which configure a linear stream table.
>
> Linux guests are unaffected by this change because they choose a 2-level
> stream table layout for the QEMU SMMUv3, based on the size of its stream
> ID space.
>
> ref. ARM IHI 0070C, section 6.3.23.
>
> Signed-off-by: Simon Veith <sve...@amazon.de>
> Cc: Eric Auger <eric.au...@redhat.com>
> Cc: qemu-devel@nongnu.org
> Cc: qemu-...@nongnu.org
> ---
> hw/arm/smmuv3.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index e2fbb83..eef9a18 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -429,7 +429,7 @@ static int smmu_find_ste(SMMUv3State *s, uint32_t sid,
> STE *ste,
> }
> addr = l2ptr + l2_ste_offset * sizeof(*ste);
> } else {
> - addr = s->strtab_base + sid * sizeof(*ste);
> + addr = (s->strtab_base & SMMU_BASE_ADDR_MASK) + sid * sizeof(*ste);
Not related to this patch but I noticed SMMU_BASE_ADDR_MASK should be
0xffffffffffc0 and not 0xffffffffffe0. I can fix it separately or if you
respin, you may fix it as well?
> }
>
> if (smmu_get_ste(s, addr, ste, event)) {
>
Besides
Acked-by: Eric Auger <eric.au...@redhat.com>
Thanks
Eric
