TID3 trapping should be mostly fixed for 4.2 -- we will trap accesses to
all the coprocessor/sysreg ID registers that TID3 covers. Trapping of
aarch32 MVFR* (which are accessed via vmrs) will not make it into this
release, but should be in 5.0.
** Changed in: qemu
Status: Confirmed => In Progress
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https://bugs.launchpad.net/bugs/1843254
Title:
arm emulation of HCR.TID3 traps are not implemented
Status in QEMU:
In Progress
Bug description:
On ARM (aarch64), HCR_EL2.TID3 [bit18] is supposed to trap ID group 3,
which includes the ID_AA64{PFR,DFR,ISAR,MMFR,AFR}*_EL1 registers.
However, setting that HCR bit has no effect and accesses to those ID
registers are not trapped to EL2 with an EC syndrome value of 0x18.
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