On Tue, Nov 19, 2019 at 11:21:10AM -0500, Peter Xu wrote: > On Tue, Nov 19, 2019 at 06:05:11AM -0500, Michael S. Tsirkin wrote: > > On Tue, Nov 19, 2019 at 08:28:12PM +0800, qi1.zh...@intel.com wrote: > > > From: "Zhang, Qi" <qi1.zh...@intel.com> > > > > > > spilt the reserved fields arrays and remove TM field from reserved > > > bits > > > > Looks good to me. > > Also Cc Peter Xu. > > Also I wonder - do we need to version this change > > with the machine type? Peter what's your take? > > It should be a bugfix to me. With the patchset we check even less > reserved bits, then imho it shouldn't break any existing good users. > So we can probably skip versioning this change.
Can you ack this patch then? > > Also, Peter, how about we create a MAINTAINERS entry for IOMMUs > > and add everyone involved, this way people will > > remember to CC you? > > Sure, I'll be fine with either way. > > Thanks, > > -- > Peter Xu
