From: "Emilio G. Cota" <c...@braap.org> Signed-off-by: Emilio G. Cota <c...@braap.org> Reviewed-by: Richard Henderson <richard.hender...@linaro.org> Signed-off-by: Alex Bennée <alex.ben...@linaro.org> Reviewed-by: Alistair Francis <alistair.fran...@wdc.com> Acked-by: Palmer Dabbelt <pal...@sifive.com>
diff --git a/target/riscv/translate.c b/target/riscv/translate.c index adeddb85f67..b26533d4fd7 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -779,7 +779,7 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) DisasContext *ctx = container_of(dcbase, DisasContext, base); CPURISCVState *env = cpu->env_ptr; - ctx->opcode = cpu_ldl_code(env, ctx->base.pc_next); + ctx->opcode = translator_ldl(env, ctx->base.pc_next); decode_opc(ctx); ctx->base.pc_next = ctx->pc_succ_insn; -- 2.20.1