On 05/22/2011 01:53 PM, Jan Kiszka wrote:
On 2011-05-22 10:41, Gleb Natapov wrote:
>> The chipset knows about the priorities. How to communicate them to
>> the core?
>>
>> - at runtime, with hierarchical dispatch of ->read() and ->write():
>> slow, and doesn't work at all for RAM.
>> - using registration order: fragile
>> - using priorities
>>
> - by resolving overlapping and registering flattened list with the core.
> (See example above).
[Registration would happens with the help of the core against the next
higher layer.]
To do this, you need to
- open-code the resolution logic at every level (very bad idea)
- provide library services to obtain a flattened representation
Please try to specify such an API without any parameters that are
priority-like.
Another way of saying the same thing: having the chipset code resolve
conflicts, and having the chipset code assign priorities, are
equivalent. But having priorities allows flattening to take place
without further involvement of the chipset code.
--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.
