On Wed, Sep 18, 2019 at 06:06:24PM +0200, Cédric Le Goater wrote:
> and use this helper to exclude CPUs which were not enabled by the XIVE
> controller.
> 
> Signed-off-by: Cédric Le Goater <c...@kaod.org>

Reviewed-by: David Gibson <da...@gibson.dropbear.id.au>

> ---
>  hw/intc/pnv_xive.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
> index e1c15b6b5b71..5c97ccda1cad 100644
> --- a/hw/intc/pnv_xive.c
> +++ b/hw/intc/pnv_xive.c
> @@ -408,6 +408,14 @@ static int cpu_chip_id(PowerPCCPU *cpu)
>      CPU_FOREACH(cs)                                                     \
>          if (chip->chip_id != cpu_chip_id(POWERPC_CPU(cs))) {} else
>  
> +static bool pnv_xive_is_cpu_enabled(PnvXive *xive, PowerPCCPU *cpu)
> +{
> +    int pir = cpu_pir(cpu);
> +    int thrd_id = pir & 0x7f;
> +
> +    return xive->regs[PC_THREAD_EN_REG0 >> 3] & PPC_BIT(thrd_id);
> +}
> +
>  static int pnv_xive_match_nvt(XivePresenter *xptr, uint8_t format,
>                                uint8_t nvt_blk, uint32_t nvt_idx,
>                                bool cam_ignore, uint8_t priority,
> @@ -426,6 +434,10 @@ static int pnv_xive_match_nvt(XivePresenter *xptr, 
> uint8_t format,
>          XiveTCTX *tctx = XIVE_TCTX(pnv_cpu_state(cpu)->intc);
>          int ring;
>  
> +        if (!pnv_xive_is_cpu_enabled(xive, cpu)) {
> +            continue;
> +        }
> +
>          /*
>           * Check the thread context CAM lines and record matches.
>           */

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

Attachment: signature.asc
Description: PGP signature

Reply via email to