On 25/09/19 23:49, Sebastian Andrzej Siewior wrote: > #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypass > Disable */ > > +#define CPUD_800_008_EBX_CLZERO (1U << 0) /* CLZERO instruction > */ > +#define CPUD_800_008_EBX_XSAVEERPTR (1U << 2) /* Always save/restore FP > error pointers */ > #define CPUID_8000_0008_EBX_WBNOINVD (1U << 9) /* Write back and
Well, there are obvious typos here but I can fix them for you. Which processors have these? Paolo
