On 12/09/2019 11:30, Balamuruhan S wrote: > Hi All, > > This is follow-up patch that implements HOMER and OCC SRAM device > models to emulate homer memory and occ common area access for pstate > table, occ sensors, runtime data and slw.
So, now, we can write directly to the OCC SRAM memory region from the QEMU monitor. How will skiboot pick up the changes ? C. > > Currently skiboot disables the homer/occ code path with `QUIRK_NO_PBA`, > this quirk have to be removed in skiboot for it to use HOMER and OCC > SRAM device models along with a bug fix, > > https://github.com/balamuruhans/skiboot/commit/a655514d2a730e0372a2faee277d1cf01f71a524 > https://github.com/balamuruhans/skiboot/commit/fd3d93d92ec66a7494346d6d24ced7b48264c9a0 > > This version fixes a review comment from Cedric in previous version, > > changes in v3: > * pass on PnvHomer *homer directly to core_max_array() function > from the caller. > > v2 patchset: > https://lists.gnu.org/archive/html/qemu-devel/2019-09/msg02231.html > > changes in v2: > * change to PnvHomer/PnvHomerClass instead of PnvHOMER/PnvHOMERClass > for better code readabililty. > * fabric link to chip to use `nr_cores` from PnvChip struct for > core_max_array() as we need to consider active cores in chip and not > whole machine. > * declare variable well ahead instead in for() loop syntax to make > all compilers happy. > * change to shorter variable name to `hmrc` instead of `homer_class`. > * remove `homer_` prefix for regs as it is not useful. > * have separate commit for checkpatch.pl coding style warnings. > > v1 patchset: > https://lists.gnu.org/archive/html/qemu-devel/2019-09/msg01610.html > > changes in v1: > * breaks it to have separate patch series for Homer and OCC > emulation. > * reuse PnvOCC device model to implement SRAM device. > * implement PnvHomer as separate device model. > * have core max base address as part of PnvHOMERClass. > * reuse PNV_CHIP_INDEX() instead of introducing new `chip_num`. > * define all the memory ops access address as macros. > * few coding style warnings given by checkpatch.pl. > > rfc patchset: > https://lists.gnu.org/archive/html/qemu-devel/2019-08/msg00979.html > > I request for review, comments and suggestions for the changes. > > Balamuruhan S (4): > hw/ppc/pnv_xscom: retrieve homer/occ base address from PBA BARs > hw/ppc/pnv_occ: add sram device model for occ common area > hw/ppc/pnv_homer: add PowerNV homer device model > hw/ppc/pnv: fix checkpatch.pl coding style warnings > > hw/ppc/Makefile.objs | 1 + > hw/ppc/pnv.c | 87 ++++++++++++--- > hw/ppc/pnv_homer.c | 272 > +++++++++++++++++++++++++++++++++++++++++++++ > hw/ppc/pnv_occ.c | 78 +++++++++++++ > hw/ppc/pnv_xscom.c | 34 +++++- > include/hw/ppc/pnv.h | 21 ++++ > include/hw/ppc/pnv_homer.h | 53 +++++++++ > include/hw/ppc/pnv_occ.h | 3 + > 8 files changed, 528 insertions(+), 21 deletions(-) > create mode 100644 hw/ppc/pnv_homer.c > create mode 100644 include/hw/ppc/pnv_homer.h >
