On Wed, Sep 11, 2019 at 2:35 PM liuzhiwei <zhiwei_...@c-sky.com> wrote:
> From: LIU Zhiwei <zhiwei_...@c-sky.com>
>
> Signed-off-by: LIU Zhiwei <zhiwei_...@c-sky.com>
> ---
> target/riscv/cpu.h | 28 ++++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 0adb307..c992b1d 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -93,9 +93,37 @@ typedef struct CPURISCVState CPURISCVState;
>
> #include "pmp.h"
>
> +#define VLEN 128
> +#define VUNIT(x) (VLEN / x)
> +
> struct CPURISCVState {
> target_ulong gpr[32];
> uint64_t fpr[32]; /* assume both F and D extensions */
> +
> + /* vector coprocessor state. */
> + struct {
> + union VECTOR {
> + float64 f64[VUNIT(64)];
> + float32 f32[VUNIT(32)];
> + float16 f16[VUNIT(16)];
> + uint64_t u64[VUNIT(64)];
> + int64_t s64[VUNIT(64)];
> + uint32_t u32[VUNIT(32)];
> + int32_t s32[VUNIT(32)];
> + uint16_t u16[VUNIT(16)];
> + int16_t s16[VUNIT(16)];
> + uint8_t u8[VUNIT(8)];
> + int8_t s8[VUNIT(8)];
> + } vreg[32];
> + target_ulong vxrm;
> + target_ulong vxsat;
> + target_ulong vl;
> + target_ulong vstart;
> + target_ulong vtype;
> + float_status fp_status;
> + } vfp;
> +
> + bool foflag;
> target_ulong pc;
> target_ulong load_res;
> target_ulong load_val;
> --
> 2.7.4
>
>
Could the VLEN be configurable in cpu initialization but not fixed in
compilation phase ?
Take the integer element as example and the difference should be the
stride of vfp.vreg[x] isn't continuous
struct {
union VECTOR {
uint64_t *u64;
uint16_t *u16;
uint8_t *u8;
} vreg[32];
} vfp;
initialization
int vlen = 256; //parameter from cpu command line option
int elem = vlen / 8;
int size = elem * 32;
uint8_t *mem = malloc(size)
for (int idx = 0; idx < 32; ++idx) {
vfp.vreg[idx].u64 = (void *)&mem[idx * elem];
vfp.vreg[idx].u32 = (void *)&mem[idx * elem];
vfp.vreg[idx].u16 = (void *)&mem[idx * elem];
}
chihmin
