On 9/6/19 2:12 PM, Moger, Babu wrote: > Introduce cpu core complex id(ccx_id) in x86CPU topology. > Each CCX can have upto 4 cores and share same L3 cache. > This information is required to build the topology in > new apyc mode. > > Signed-off-by: Babu Moger <babu.mo...@amd.com> > ---
> +++ b/qapi/machine.json > @@ -597,9 +597,10 @@ > # @node-id: NUMA node ID the CPU belongs to > # @socket-id: socket number within node/board the CPU belongs to > # @die-id: die number within node/board the CPU belongs to (Since 4.1) > +# @ccx-id: core complex number within node/board the CPU belongs to (Since > 4.1) 4.2 now > # @core-id: core number within die the CPU belongs to# @thread-id: thread > number within core the CPU belongs to Pre-existing, but let's fix that missing newline while you're here. -- Eric Blake, Principal Software Engineer Red Hat, Inc. +1-919-301-3226 Virtualization: qemu.org | libvirt.org
